Micro-Nano Electronics

  • Name:Yaoyao Ye
  • Title:Assistant Professor
  • Office:Building of Microelectronics, Rm 418
  • Office Phone:+86-21-34204546-1041
  • Email:yeyaoyao@sjtu.edu.cn
  • Website:

Research Field

Interconnection Network, Multiprocessor System-on-Chip, Embedded System, Software Defined Network

Education

Ph.D. in Electronic and Computer Engineering, The Hong Kong University of Science and Technology, 2013;
B.S. in Eletronic Science and Technology, University of Science and Technology of China, 2008

Work experience

2013-2014, Research engineer, Huawei Shannon IT Laboratory, China;
2015-present, Assistant Professor, Department of Micro/Nano Electronics, Shanghai Jiao Tong University

Research

Prof. Ye served on technical program committees of ASP-DAC 2016, ASP-DAC 2017, and GLSVLSI 2017. She has authored or coauthored one book chapter and more than 30 papers in peer-reviewed journals and international conferences.

Awards and Honors

Shanghai Sailing Program for young scientific talents (June 2016 to May 2019)

Teaching

EI015-Signals and Systems, Spring 2016-2017;
CS902-Python Programming, Fall 2016-2017

Publications

Book Chapters:
[1] Peng Yang, Xiaowen Wu, Yaoyao Ye, Jiang Xu, “Unified Inter- and Intra-Chip Optical Interconnect Networks”, Photonic Interconnects for Computer Systems, River Publishers, 2017.

Referred Journal Publications:
[1] Xiaowen Wu, Jiang Xu, Yaoyao Ye, Xuan Wang, Mahdi Nikdast, Zhehui Wang, Zhe Wang, An Inter/Intra-chip Optical Network for Manycore Processors”, IEEE Transactions on Very Large Scale Integration Systems, vol.23, no.4, pp.678-691, April 2015.
[2] Xuan Wang, Jiang Xu, Weichen Liu, Wei Zhang, Xiaowen Wu, Yaoyao Ye, Zhehui Wang, Mahdi Nikdast, Zhe Wang, “Actively Alleviate Power-Gating-Induced Power/Ground Noise Using Parasitic Capacitance of On-Chip Memories in MPSoC”, IEEE Transactions on Very Large Scale Integration Systems, vol.23, no.2, pp.266-279, Feb. 2015.
[3] Mahdi Nikdast, Jiang Xu, Luan H.K. Duong, Xiaowen Wu, Xuan Wang, Zhehui Wang, Zhe Wang, Peng Yang, Yaoyao Ye, Qinfen Hao, “Crosstalk Noise in WDM-based Optical Networks-on-Chip: a Formal Study and Comparison”, IEEE Transactions on Very Large Scale Integration Systems, vol.23, no.11, pp.2552-2565, November 2015.
[4] Yaoyao Ye, Zhehui Wang, Peng Yang, Jiang Xu, Xiaowen Wu, Xuan Wang, Mahdi Nikdast, Zhe Wang, Luan Huu Kinh Duong, “System-Level Modeling and Analysis of Thermal Effects in WDM-Based Optical Networks-on-Chip”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 33, no. 11, pp. 1718-1731, November 2014.
[5] Xiaowen Wu, Jiang Xu, Yaoyao Ye, Zhehui Wang, Mahdi Nikdast, Xuan Wang, “SUOR: Sectioned Undirectional Optical Ring for Chip Multiprocessor”, ACM Journal on Emerging Technologies in Computing Systems, vol. 10 no. 4, May 2014.
[6] Zhehui Wang, Jiang Xu, Xiaowen Wu, Yaoyao Ye, Wei Zhang, Mahdi Nikdast, Xuan Wang, Zhe Wang, “Floorplan Optimization of Fat-Tree Based Networkson-Chip for Chip Multiprocessors”, IEEE Transactions on Computers, vol. 63, no. 6, pp. 1446-1459, June 2014.
[7] Weichen Liu, Xuan Wang, Jiang Xu, Wei Zhang, Yaoyao Ye, Xiaowen Wu, Mahdi Nikdast, Zhehui Wang, “On-Chip Sensor Networks for Soft-Error Tolerant RealTime Multiprocessor Systems-on-Chip”, ACM Journal on Emerging Technologies in Computing Systems, vol. 10, no. 2, pp. 15:1-15:20, February 2014.
[8] Mahdi Nikdast, Jiang Xu, Xiaowen Wu, Wei Zhang, Yaoyao Ye, Xuan Wang, Zhehui Wang, Zhe Wang, “Systematic Analysis of Crosstalk Noise in Folded-TorusBased Optical Networks-on-Chip”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 33, no. 3, pp. 437-450, March 2014.
[9] Yaoyao Ye, Jiang Xu, Baihan Huang, Xiaowen Wu, Wei Zhang, Xuan Wang, Mahdi Nikdast, Zhehui Wang, Weichen Liu, and Zhe Wang, “3D Mesh-based Optical Network-on-Chip for Multiprocessor System-on-Chip”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 32, no. 4, pp. 584-596, April 2013.
[10] Yaoyao Ye, Jiang Xu, Xiaowen Wu, Wei Zhang, Xuan Wang, Mahdi Nikdast, Zhehui Wang, and Weichen Liu, “System-Level Modeling and Analysis of Thermal Effects in Optical Networks-on-Chip”, IEEE Transactions on Very Large Scale Integration Systems, vol. 21, no. 2, pp. 292-305, February 2013.
[11] Xiaowen Wu, Yaoyao Ye, Jiang Xu, Wei Zhang, Weichen Liu, Mahdi Nikdast, Xuan Wang, “UNION: A Unified Inter/Intra-Chip Optical Network for Chip Multiprocessors”, IEEE Transactions on Very Large Scale Integration Systems, vol. 99, pp. 1-14, June 2013.
[12] Yiyuan Xie, Mahdi Nikdast, Jiang Xu, Xiaowen Wu, Wei Zhang, Yaoyao Ye, Xuan Wang, Zhehui Wang, Weichen Liu, “Formal Worst-Case Analysis of Crosstalk Noise in Mesh-Based Optical Networks-on-Chip”, IEEE Transactions on Very Large Scale Integration Systems, vol. 21, no. 10, pp. 1823-1836, October 2013.
[13] Yaoyao Ye, Jiang Xu, Xiaowen Wu, Wei Zhang, Weichen Liu, and Mahdi Nikdast, “A Torus-Based Hierarchical Optical-Electronic Network-on-Chip for Multiprocessor System-on-Chip”, ACM Journal on Emerging Technologies in Computing Systems, vol. 8, no 1, February 2012.
[14] Kai Feng, Yaoyao Ye, Jiang Xu, “A Formal Study on Topology and Floorplan Characteristics of Mesh and Torus-based Optical Networks-on-Chip”, Microprocessors and Microsystems, June 2012.
[15] Weichen Liu, Zonghua Gu, Jiang Xu, Xiaowen Wu, Yaoyao Ye, “Satisfiability Modulo Graph Theory for Task Mapping and Scheduling on Multiprocessor Systems”, IEEE Transactions on Parallel and Distributed Systems, vol. 22, no. 8, August 2011.
[16] Weichen Liu, Jiang Xu, Jogesh Muppala, Wei Zhang, Xiaowen Wu, Yaoyao Ye, “Coroutine-based Synthesis of Efficient Embedded Software from SystemC Models”, IEEE Embedded Systems Letters, vol.3, no.1, March 2011.


Conference Publications:
[1] Kang Yao, Yaoyao Ye, Jiang Xu and Sudeep Pasricha, “Thermal-Sensitive Design and Power Optimization for a 3D Torus-Based Optical NoC”, International Conference On Computer Aided Design (ICCAD), November 13-16, 2017, Irvine Marriott, Irvine, CA.
[2] Yaoyao Ye, Taeyoung Kim, Haibao Chen, Hai Wang, Esteban Tlelo-Cuautle and Sheldon X.-D. Tan, “Comprehensive Detection of Counterfeit ICs Via On-Chip Sensor and Post-Fabrication Authentication Policy”, SMACD, Giardini Naxos, Italy, 2017, pp. 1-4.
[3] Weichen Liu, Zonghua Gu, Yaoyao Ye, ”Efficient SAT-based application mapping and scheduling on multiprocessor systems for throughput maximization,” CASES, Amsterdam, 2015, pp. 127-136.
[4] Jie Dai, Weichen Liu, Xiaohao Lin, Yaoyao Ye, Chunming Xiao, Kaijie Wu, Qingfeng Zhuge, Sha, E.H.M., ”User Experience Enhanced Task Scheduling and Processor Frequency Scaling for Energy-Sensitive Mobile Devices,” IEEE 17th International Conference on High Performance Computing and Communications, IEEE 7th International Symposium on Cyberspace Safety and Security, and IEEE 12th International Conference on Embedded Software and Systems, New York, NY, 2015, pp. 941-944.
[5] Zhehui Wang, Jiang Xu, Peng Yang, Xuan Wang, Zhe Wang, Luan H.K. Duong, Zhifei Wang, Haoran Li, Rafael K.V. Maeda, Xiaowen Wu, Yaoyao Ye, Qinfen Hao, “Alleviate Chip I/O Pin Constraints for Multicore Processors through Optical Interconnects”, ASP-DAC, Tokyo, Japan, January 2015.
[6] Mahdi Nikdast, Luan H. K. Duong, Jiang Xu, Sebastien Le Beux, Xiaowen Wu, Zhehui Wang, Peng Yang, Yaoyao Ye, “CLAP: a Crosstalk and Loss Analysis Platform for Optical Interconnects”, IEEE/ACM International Symposium on Networks-on-Chip (NOCS), Italy, September 2014
[7] Yaoyao Ye, Xiaowen Wu, Jiang Xu, Mahdi Nikdast, Zhehui Wang, Xuan Wang, and Zhe Wang, “System-Level Analysis of Mesh-based Hybrid Optical-Electronic Network-on-Chip”, the 2013 IEEE International Symposium on Circuits and Systems, Beijing, China, May 2013. (Invited)
[8] Xuan Wang, Jiang Xu, Wei Zhang, Xiaowen Wu, Yaoyao Ye, Zhehui Wang, Mahdi Nikdast, Zhe Wang, “Active Power-Gating-Induced Power/Ground Noise Alleviation Using Parasitic Capacitance of On-Chip Memories”, DATE, Grenoble, France, 2013, pp. 1221-1224.
[9] Yaoyao Ye, Jiang Xu, Xiaowen Wu, Wei Zhang, Weichen Liu, Mahdi Nikdast, Xuan Wang, Zhehui Wang, and Zhe Wang, “Thermal Analysis for 3D Optical Network-on-Chip Based on a Novel Low-Cost 6x6 Optical Router”, IEEE Optical Interconnects Conference, Santa Fe, New Mexico, USA, May 2012.
[10] Yaoyao Ye, Xiaowen Wu, Jiang Xu, Wei Zhang, Mahdi Nikdast, Xuan Wang, Zhehui Wang, and Zhe Wang, “Holistic Comparison of Optical Routers for Chip Multiprocessors”, ASID, Taipei, Taiwan, August 2012. (Invited)
[11] Zhehui Wang, Jiang Xu, Xiaowen Wu, Yaoyao Ye, Wei Zhang, Weichen Liu, Mahdi Nikdast, Xuan Wang, Zhe Wang, “A Novel Low-Waveguide-Crossing Floorplan for Fat Tree Based Optical Networks-on-Chip”, IEEE Optical Interconnects Conference, Santa Fe, New Mexico, May 2012.
[12] Yaoyao Ye, Jiang Xu, Xiaowen Wu, Wei Zhang, Xuan Wang, Mahdi Nikdast, Zhehui Wang, Weichen Liu, “Modeling and Analysis of Thermal Effects in Optical Networks-on-Chip”, ISVLSI, Chennai, India, July 2011.
[13] Weichen Liu, Jiang Xu, Xiaowen Wu, Yaoyao Ye, Xuan Wang, Wei Zhang, Mahdi Nikdast, Zhehui Wang, “A NoC Traffic Suite Based on Real Applications”, ISVLSI, July 2011.
[14] Weichen Liu, Jiang Xu, Xiaowen Wu, Yaoyao Ye, Xuan Wang, Wei Zhang, Mahdi Nikdast, Zhehui Wang, “MCSL: A Realistic Traffic Benchmark Suite for Network-on-Chip Studies”, DAC, June 2011. (Poster)
[15] Weichen Liu, Jiang Xu, Xuan Wang, Yu Wang, Wei Zhang, Yaoyao Ye, Xiaowen Wu, Mahdi Nikdast, Zhehui Wang, “A Hardware-Software Collaborated Method for Soft-Error Tolerant MPSoC”, ISVLSI, July 2011.
[16] Weichen Liu, Jiang Xu, Xuan Wang, Yu Wang, Wei Zhang, Yaoyao Ye, Xiaowen Wu, Mahdi Nikdast, Zhehui Wang, “A Low-Overhead Hardware-Software Collaborated Approach for Soft-Error Tolerance”, DAC, June 2011. (Poster)
[17] Xiaowen Wu, Yaoyao Ye, Wei Zhang, Weichen Liu, Mahdi Nikdast, Xuan Wang, Jiang Xu, “A Unified Inter/Intra-chip Optical Interconnect Network”, IEEE/ACM International Symposium on Nanoscale Architectures, 2010. (Invited)
[18] Kwai Hung Mo, Yaoyao Ye, Xiaowen Wu, Wei Zhang, Weichen Liu, Jiang Xu, “A Hierarchical Hybrid Optical-Electronic Network-on-Chip”, ISVLSI, Lixouri Kefalonia, Greece, July 2010.
[19] Mahdi Nikdast, Jiang Xu, Xiaowen Wu, Yaoyao Ye, Weichen Liu, Xuan Wang, “A Formal Analysis of Crosstalk Noise in Mesh-Based Optical Networks-on-Chip for Chip Multiprocessors”, AMD Technical Forum and Exhibition, Taipei, Taiwan, October 2010. (Best Poster Award)
[20] Weichen Liu, Xuan Wang, Jiang Xu, Xiaowen Wu, Yaoyao Ye, Mahdi Nikdast, “A Case Study of On-Chip Sensor Networks for Soft-Error Tolerant Multiprocessor Systems-on-Chip”, AMD Technical Forum and Exhibition, Taipei, Taiwan, October 2010. (Invited Poster)
[21] Yiyuan Xie, Mahdi Nikdast, Jiang Xu, Wei Zhang, Qi Li, Xiaowen Wu, Yaoyao Ye, Weichen Liu, Xuan Wang, “Crosstalk Noise and Bit Error Rate Analysis for Optical Network-on-Chip”, DAC, Anaheim, California, USA, June 2010.
[22] Yaoyao Ye, Lian Duan, Jiang Xu, Jin Ouyang, Kwai Hung Mo, Yuan Xie, “3D Optical NoC for MPSoC”, 3DIC, San Francisco, USA, September 2009.

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