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- Name：绳伟光
- Title：Research Assistant Professor
- Office：Room 418, Microelectronics Building
- Office Phone：+86-21-34204546-1047
- Email：wgshenghit@sjtu.edu.cn
- Website：
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Research Field
1) Reconfigurable Computing
2) High Reliable Integrated Circuits
Education
1) 2004/9 - 2009/9，Harbin Institute of Technology，Microelectronics and Solid State Electronics，Ph.D
2) 2002/9 - 2004/7，Harbin Institute of Technology，Computer Science and Technology，Master
3) 1995/9 - 1999/7，Harbin Institute of Technology，Electrical Chemistry，Bachelor
Work experience
2012/2– ，Shanghai Jiao Tong University，Department of Micro/Nano Electronics，Research Assistant Professor
2009/11 - 2012/2，Shanghai Jiao Tong University，School of Microelectronics，Postdoctoral Research
Research
1) Projects from 863 program;
2) National Science Foundation of China;
3) Project from Core Electronic Devices, High-end Generic Chips and Basic Software Program;
4) Horizontal research project.
Awards and Honors
Teaching
1) C Program and Algorithm Design;
2) Introduction to Compiler Techniques and Algorithms Design;
3) Algorithm Theory.
Publications
1) A static-placement, dynamic-issue framework for CGRA loop accelerator. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017. 2017: 1348-1353.
2) Parallel SER analysis for combinational and sequential standard cell circuits[J]. Microelectronics Journal, 2016,50: 8-19.
3) Soft error optimization of standard cell circuits based on gate sizing and multi-objective genetic algorithm. Proceedings of the 46th ACM/IEEE Design Automation Conference (DAC '09). 2009: 502-507.
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Others
